Semiconductor device and method with improved flat surface
US6538301B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 27, 1998 |
| Grant date | Mar 25, 2003 |
| Priority date | — |
| Expiry date | Aug 27, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor substrate has an element formation region and a scribe line region surrounding the element formation region. A metal wiring layer is formed so as to cover end portions of a plurality of interlayer insulating films over the entire periphery of the element formation region and includes cut portions at the corner of the element formation region. Then, a SOG film is formed on the entire surface of the substrate by spin coating, at that time, material of the SOG film flows out through the cut portion toward the scribe line region to prevent a SOG puddle from forming at the corner of the element formation region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.