Semiconductor device and a method of manufacturing the same
US6538331B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jan 26, 2001 |
| Grant date | Mar 25, 2003 |
| Priority date | — |
| Expiry date | Mar 2, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1572
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Two memory chips mounted over a base substrate have the same external size and a flash memory of the same memory capacity formed thereon. These memory chips are mounted over the base substrate with one of them being overlapped with the upper portion of the other one, and they are stacked with their faces being turned in the same direction. The bonding pads BP of one of the memory chips are disposed in the vicinity of the bonding pads BP of the other memory chip. In addition, the upper memory chip is stacked over the lower memory chip in such a way that the upper memory chip is slid in a direction (X direction) parallel to the one side of the lower memory chip and in a direction (Y direction) perpendicular thereto in order to prevent partial overlapping of it with the bonding pads BP of the lower memory chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.