Transient noise reduction circuits, systems and methods in power digital-to-analog converters
US6538590B1 · kind B1 · utility
10Cited by
4References
35Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2001 |
| Grant date | Mar 25, 2003 |
| Priority date | — |
| Expiry date | Apr 27, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/822
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system for suppressing transient noise in switched-mode amplifier systems is disclosed. An amplifier, for amplifying a signal from a digital signal source includes a first complementary metal oxide semiconductor field effect transistor (MOSFET) pair. A common node of the pair is serially coupled to an output node of the amplifier by a resistor. The first MOSFET pair is configured to drive a ramp on the output node of the amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.