Multiple data rate filtered modulation system for digital data
US6539064B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 21, 1999 |
| Grant date | Mar 25, 2003 |
| Priority date | — |
| Expiry date | Jan 21, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/2017
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A multi-rate data modulation circuit includes a multi-rate data conversion circuit and a modulator such as a direct digital synthesis circuit. The multi-rate data conversion circuit receives digital data at varying data rates, receives a data rate input corresponding to the digital data and converts the digital data to a converted output based upon the data rate input. The direct digital synthesis circuit receives the converted output and synthesizes a modulated output signal based upon the converted output. The multi-rate data conversion circuit may include a multi-rate converter, a multi-rate digital data filter, an output scaler and an adder. The multi-rate converter receives the digital data, the data rate input and a clock signal and converts the digital data to converted digital data. The multi-rate digital data filter receives the converted digital data and produces a filtered digital output. The output scaler receives the filtered digital output and produces a scaled and filtered digital output. Finally, the adder combines the scaled and filtered digital output with a center frequency input and produces the converted output. The multi-rate digital data filter may include a …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.