MOS variable capacitor with controlled dC/dV and voltage drop across W of gate
US6541814B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 6, 2001 |
| Grant date | Apr 1, 2003 |
| Priority date | — |
| Expiry date | Nov 6, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/66
Abstract
A voltage-variable capacitor is constructed from a metal-oxide-semiconductor transistor. The transistor source has at least two contacts that are biased to different voltages. The source acts as a resistor with current flowing from an upper source contact to a lower source contact. The gate-to-source voltage varies as a function of the position along the source-gate edge. A critical voltage is where the gate-to-source voltage is equal to the transistor threshold. A portion of the source has source voltages above the critical voltage and no conducting channel forms under the gate. Another portion of the source has source voltages below the critical voltage, and thus a conducting channel forms under the gate for this portion of the capacitor. By varying either the gate voltage or the source voltages, the area of the gate that has a channel under it is varied, varying the capacitance. Separate source islands eliminate source current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.