Flash analog-to-digital converter using folded differential logic encoder having capacitors which distribute charge
US6542107B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2002 |
| Grant date | Apr 1, 2003 |
| Priority date | — |
| Expiry date | Jan 11, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/36
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog-to-digital converter, including a code generator, coupled to receive an input analog voltage and to one or more reference voltages, and adapted to generate a digital code responsive thereto, and one or more folded differential logic encoders (FDLEs) . Each of the FDLEs includes a plurality of capacitors and switching logic. The switching logic is coupled to receive the digital code and distribute a charge between the plurality of capacitors responsive to the received digital code, and to output a digital bit indicative of the input analog voltage responsive to a magnitude of a potential generated by the distributed charge on at least one of the plurality of capacitors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.