Flat panel display of a sealing channel
US6545410B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2000 |
| Grant date | Apr 8, 2003 |
| Priority date | — |
| Expiry date | Jun 28, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J11/48
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A flat panel display includes a front substrate, a rear substrate parallel to and spaced apart from the front substrate for forming a gap between the front and rear substrates. A display area is positioned on the surface of the rear substrate facing the front substrate. The flat panel display further includes a plurality of barrier ribs positioned on the display area of the rear substrate, a first channel rib positioned on at least two sides of the display area of the rear substrate, and a second channel rib spaced from the first channel rib by a predetermined distance. The first channel rib and the second channel rib form a sealing channel. A sealing frit fills the sealing channel to seal together the front substrate and the rear substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.