Circuit and method for reducing quiescent current in a voltage reference circuit
US6545530B1 · kind B1 · utility
5Cited by
2References
60Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 5, 2001 |
| Grant date | Apr 8, 2003 |
| Priority date | — |
| Expiry date | Dec 5, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/30
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A voltage reference circuit capable of operating at reduced quiescent currents is described. The voltage reference circuit comprises an output circuit, a timer circuit and a control circuit. When in standby mode, in order to decrease power consumed by the output circuit, current through the output circuit is decreased, allowing the voltage at the output node to fall outside of a desired range. To determine when this event has occurred, the control circuit includes a test circuit that generates a test signal characterized by having a voltage that is correlated with the voltage at the output terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.