Timing recovery circuit in a QAM demodulator
US6545532B1 · kind B1 · utility
28Cited by
7References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 17, 2000 |
| Grant date | Apr 8, 2003 |
| Priority date | — |
| Expiry date | Apr 17, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0081
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A timing recovery circuit in a QAM demodulator which uses a symbol rate continuously adaptive interpolation filter. The method of interpolation used in the present invention is defined as a function of time per interpolation interval, rather than as a function of time per sampling interval as is commonly implemented in the prior art. This allows the interpolation filtering to be totally independent of the symbol rate in terms of complexity and performance and provides a better rejection of adjacent channels, since the interpolator rejects most of the signal outside the bandwidth of the received channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.