Programmable analog tapped delay line filter having cascaded differential delay cells
US6545567B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2001 |
| Grant date | Apr 8, 2003 |
| Priority date | — |
| Expiry date | Sep 17, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H15/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Method and system for a programmable analog tapped delay line filter are disclosed. One embodiment of the present invention is a programmable analog tapped delay line filter comprising an input line, an output line, and one or more gaincells or taps coupled between the input line and the output line. The input and output lines each comprises a cascade of one or more differential delay cells, and each of the one or more gaincells or taps corresponds to a tap weight or coefficient. Furthermore, the input and output lines are terminated in impedances and the filter produces one or more outputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.