Active trace debugging for hardware description languages
US6546526B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 19, 2001 |
| Grant date | Apr 8, 2003 |
| Priority date | — |
| Expiry date | Oct 5, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
HDL code is used to describe a circuit in an HDL code debugger on a computer system. Circuit simulation data is obtained for the circuit, the simulation data being generated according to the HDL code. A circuit execution time is selected, and the simulation data should at least span the circuit execution time. A debugging element is selected, which is a circuit element in the circuit having a debugging state at the circuit execution time according to the simulation data. A target line of HDL code is then presented to a user. The target line of HDL code is the line of code responsible for setting the debugging element into the debugging state at the circuit execution time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.