Adjustable offset voltage circuit
US6549053B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2001 |
| Grant date | Apr 15, 2003 |
| Priority date | — |
| Expiry date | Jul 26, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0292
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An adjustable offset voltage circuit is disclosed for applying an offset voltage to a differential voltage in a digital data receiver system. The circuit includes a pair of emitter follower units, and a pair of current generating units. The first emitter follower unit provides a first offset voltage, and the second emitter follower unit provides a second offset voltage. The first current generating unit provides a biasing current to the first emitter follower unit, and the second current generating unit provides a biasing current to the second emitter follower unit. The circuit also includes a pair of differential signal input ports, each of which is coupled to one of the first and second emitter follower units, and an offset adjustment unit for permitting offset adjustment of a differential output signal with respect to a differential input signal at the input ports.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.