Method and apparatus for improving the tolerance of integrated resistors
US6549062B1 · kind B1 · utility
6Cited by
7References
41Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2001 |
| Grant date | Apr 15, 2003 |
| Priority date | — |
| Expiry date | Nov 21, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
Abstract
A deice maximizes the allowable granularity of adjustment of a bus driver line characteristics by compensating for temperature variations by selecting components that have an opposite and approximately equal thermal coefficient. In the first aspect, component parts may be made smaller because their tolerances need not be made so precise. In the second aspect, duplicating the circuitry with matching characteristics allows one circuit to be operational while the other circuit is tested or dormant. Switching between the two circuits is performed seamlessly with no interruption of device operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.