Semiconductor memory device and information device
US6549475B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2002 |
| Grant date | Apr 15, 2003 |
| Priority date | — |
| Expiry date | Jun 25, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device in which an input command controls an operation includes a command state machine for decoding the input command and outputting the decoding result; a plurality of status registers for storing state information of the semiconductor memory device; a first switching circuit for receiving data from the plurality of status registers, and selectively outputting the data from at least one of the plurality of status registers to a first data bus; and a second switching circuit for receiving the data on the first data bus and data from a sense amplifier, and selectively outputting either one of data to a second data bus. At least the first switching circuit, among the first and second switching circuits, is controlled by the decoding result output by the command state machine.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.