System for a PCI proxy link architecture
US6549967B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 12, 1999 |
| Grant date | Apr 15, 2003 |
| Priority date | — |
| Expiry date | Nov 12, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/423
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A PCI bus system for a computer provides a main board with one or more PCI slots mounted on the board, and with each PCI slot adapted to receive a PCI card. Each PCI slot includes a plurality of electrical contacts. A multiplexor is provided for each PCI slot, and each multiplexor has at least first and second sets of electrical inputs selectively connectable to a set of outputs connected to a first set of the electrical contacts on its respective PCI slot. A link controller is provided for each PCI slot, with each link controller mounted on the main board. A first plurality of electrical lines for each PCI slot connect the respective link controller to the first set of electrical inputs on the respective multiplexor. A PCI controller is mounted on the main board, with a second-plurality of electrical lines connecting the PCI controller to the second set of electrical inputs on the multiplexor. Also provided are a third plurality of electrical lines connecting the PCI controller to each of a second set of electrical contacts on each PCI slot, wherein the contacts of the second set are different from the first set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.