Method and apparatus for problem identification during initial program load in a multiprocessor system
US6550019B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 4, 1999 |
| Grant date | Apr 15, 2003 |
| Priority date | — |
| Expiry date | Nov 4, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2242
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for detecting an error condition during initialization of a multiprocessor data processing system is provided. A master processor identification indicator is initialized to an initial value by a service processor in the data processing system. The master processor identification indicator may be a location in nonvolatile RAM to protect data integrity. One of the plurality of processors in the multiprocessor system is selected to be the master processor by being released by the service processor and winning the “race condition” to fetch the first instruction from memory for program execution. This processor then sets the master processor identification indicator to a unique processor identification value. The initial value may be a spoof number indicating whether the master processor has yet written its unique processor identification value. At some later point in time, the service processor detects a freeze or hang condition in the data processing system. The service processor reads the value of the master processor identification indicator and reports the value of the master processor identification indicator to indicate which processor among the…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.