Metal oxide semiconductor capacitor utilizing dummy lithographic patterns
US6551895B1 · kind B1 · utility
7Cited by
14References
15Claims
0Family size
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Key dates
| Filing date | Sep 21, 2000 |
| Grant date | Apr 22, 2003 |
| Priority date | — |
| Expiry date | Sep 21, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/09
Abstract
A semiconductor structure (and method for manufacturing the same) comprises an active array of first elements having a first manufacturing precision, a peripheral region surrounding the active array, the peripheral region including second elements having a second manufacturing precision less than the first manufacturing precision, wherein the second elements are isolated from the active array and comprise passive devices for improving operations of the active array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.