Hetero-junction field effect transistor having an intermediate layer

US6552373B2 · kind B2 · utility

Assignee

• NEC CORPORATION · JP

Inventors

• Yuji Ando · Tokyo, JP
• Hironobu Miyamoto · Tokyo, JP
• Naotaka Iwata · Tokyo, JP
• Koji Matsunaga · Hirakata, JP
• Masaaki Kuzuhara · Tokyo, JP
• Kensuke Kasahara · Tokyo, JP
• Kazuaki Kunihiro · Tokyo, JP
• Yuji Takahashi · Yokohama, JP
• Tatsuo Nakayama · Yokohama, JP
• Nobuyuki Hayama · Minato, JP
• Yasuo Ohno · Yokohama, JP

Key dates

• Filing date: Mar 28, 2001
• Grant date: Apr 22, 2003
• Expiry date: Mar 28, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/8503

Abstract

A hetero-junction FET has an intermediate layer including n-type-impurity doped layer between an electron supply layer and an n-type cap layer. The intermediate layer cancels the polarized negative charge generated between the electron supply layer and the n-type cap layer by ionized positive charge, thereby reducing the barrier against the electrons and source/drain resistance.