Integrated circuit testing apparatus
US6552555B1 · kind B1 · utility
16Cited by
3References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 19, 1999 |
| Grant date | Apr 22, 2003 |
| Priority date | — |
| Expiry date | Nov 19, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2886
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit testing apparatus includes a probe card and a probe unit. The probe unit includes a plurality of conductive elastic bumps and a plurality of conductors positioned to conduct signals from the bumps to the probe card. The testing apparatus can further includes a substrate disposed between the probe card and the probe unit, and a flexible member disposed adjacent the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.