Functional pathway configuration at a system/IC interface
US6552567B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2001 |
| Grant date | Apr 22, 2003 |
| Priority date | — |
| Expiry date | Dec 4, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/76
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates generally to functional pathway configurations at the interfaces between integrated circuits (ICs) and the circuit assemblies with which the ICs communicate. More particularly, the present invention relates generally to the functional pathway configuration at the interface between one or more semiconductor integrated circuit dice, including an IC package and the circuitry of a system wherein the integrated circuit dice is a digital signal controller. Even more particularly, the present invention relates to a 18, 28, 40, 44, 64 or 80 pin functional pathway configuration for the interface between the digital signal controller and the system in which it is embedded.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.