Low power dynamic logic gate with full voltage swing operation
US6552574B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2002 |
| Grant date | Apr 22, 2003 |
| Priority date | — |
| Expiry date | Mar 1, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0019
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Dynamic low-power logic using recycled energy is disclosed. Logic circuits have a discharge path, a precharge path and a control circuit. The precharge path is a PMOS transistor coupled between the clock line and the output node of the circuit and configured to charge the output node to the logic high voltage of the clock line during a precharge phase. During an evaluation phase, the discharge path computes the desired logic function at the output node. A control circuit is connected between the output node and the clock line and to the gate of the precharge path transistor. The control circuit provides the proper gate drive, regardless of the voltage on the output node or the inputs to the discharge path, to guarantee that the precharge transistor fully charges the output node to the logic high voltage of the clock line, which provides recycled energy for operating the circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.