Fractional-N frequency synthesizer with fractional compensation method
US6553089B2 · kind B2 · utility
30Cited by
15References
46Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2001 |
| Grant date | Apr 22, 2003 |
| Priority date | — |
| Expiry date | Aug 29, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/1976
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase-locked loop (PLL) frequency synthesizer incorporates fractional spur compensation circuitry. This fractional spur compensation circuitry dynamically compensates charge pump ripple whenever a charge pump operates. It can utilize a programmable divider, two phase detectors each using a charge pump stage pumps. A fractional accumulator stage determines the number of charge pumps that operate during a phase comparison. The PLL frequency synthesizer avoids the need for compensation current trimming. Also, fractional compensation is accomplished dynamically and in a manner that is robust to environmental changes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.