Method for designing reticle, reticle, and method for manufacturing semiconductor device
US6553274B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 2000 |
| Grant date | Apr 22, 2003 |
| Priority date | — |
| Expiry date | Jan 14, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A reticle is designed with a method including generating first dummy patterns with intervals from main patterns. Each of the first dummy patterns are divided into a plurality of spaced apart second dummy patterns and then each of the second dummy patterns are measured to find third dummy patterns having widths and areas below smallest allowable values. The third dummy patterns are then respectively connected to second dummy patterns which are adjacent to the third dummy patterns by generating a connecting dummy pattern. Selective non-connected third dummy patterns are removed. The first dummy patterns are divided into a plurality of second dummy patterns by vertical and horizontal strip lines crossing the first dummy patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.