Method for detecting signal transfer errors in near real time in a digital system
US6553519B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 1998 |
| Grant date | Apr 22, 2003 |
| Priority date | — |
| Expiry date | Oct 5, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/221
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for detecting signal transfer errors in a digital logic system that might occur in a transfer medium between a source device and a destination device. The method includes sending a first diagnostic signal of one or more bits from the source device through the transfer medium to the destination device; comparing the first diagnostic signal received by the destination device with a second diagnostic signal within the destination device to determine if a signal transfer error has occurred; inverting the first diagnostic signal; sending the inverted first diagnostic signal from the source device through the transfer medium to the destination device; and comparing the inverted first diagnostic signal received by the destination device with the second diagnostic signal to determine if a signal transfer error has occurred. Two embodiments of the invention are disclosed. To provide near real time detection without adding signal paths, the diagnostic signals are sent along established signal paths during a diagnostic clock cycle that is added to the normal clock cycles of the digital system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.