Method for manufacturing group III-V compound semiconductors
US6555845B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 14, 2001 |
| Grant date | Apr 29, 2003 |
| Priority date | — |
| Expiry date | Dec 14, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T117/10
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
The Group III-V compound semiconductor manufacturing method which pertains to the present invention is a semiconductor manufacturing method employing epitaxy which comprises (a) a step in which growing areas are produced using a mask patterned on a substrate surface and (b) a step in which a Group III-V compound semiconductor layer is grown in the growing areas while forming facet structures.As epitaxy is continued, adjacent facet structures come into contact so that the surface of the semiconductor layer becomes planarized. Since lattice defects extend towards the facet structures, they do not extend towards the surface of the semiconductor layer. Accordingly, the number of lattice defects in the vicinity of the semiconductor layer surface is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.