Method of fabricating high performance SiGe heterojunction bipolar transistor BiCMOS on a silicon-on-insulator substrate
US6555874B1 · kind B1 · utility
14Cited by
12References
12Claims
0Family size
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Key dates
| Filing date | Aug 28, 2000 |
| Grant date | Apr 29, 2003 |
| Priority date | — |
| Expiry date | Aug 28, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
Abstract
A semiconductor structure includes, on a SOI substrate, a CMOS formed on the substrate; and a SiGe HBT formed on the substrate. A method of fabricating a semiconductor structure includes preparing a SOI substrate having plural active regions thereon; forming a CMOS on the SOI substrate in a first active region; and forming a SiGe HBT on the SOI substrate in another active region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.