Device frequency measurement system
US6556021B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2000 |
| Grant date | Apr 29, 2003 |
| Priority date | — |
| Expiry date | Apr 13, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3187
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method of testing semiconductor devices on a wafer, including a tasting circuit formed on the wafer for providing an output signal indicative of at least one operational characteristic of the devices. The output signal provided by the testing circuit is compatible for monitoring using an integrated circuit tester. The testing circuit includes an oscillator, an N-bit counter, and an N-bit shift register, all formed on the semiconductor wafer. The tester resets the counter and enables the oscillator, at which time the oscillator produces oscillator pulses at an oscillator frequency. During a predetermined time period, the counter receives and counts the oscillator pulses from the oscillator, and produces a pulse count corresponding to the number of oscillator pulses received. The shift register receives the count from the counter as an N-bit digital data word. The tester shifts the N number of bits of the digital data word out of the shift register, and manipulates the bits to determine a count value. The tester then determines an oscillator frequency value by dividing the count value by a time value corresponding to the predetermined time period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.