De-interlacing video images using patch-based processing
US6556193B1 · kind B1 · utility
21Cited by
2References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 2, 1999 |
| Grant date | Apr 29, 2003 |
| Priority date | — |
| Expiry date | Apr 2, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2340/125
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention is a method and apparatus for de-interlacing image data in a memory. A read interface circuit is coupled to the memory to transfer a patch of the image data from the memory to a buffer. A de-interlacing circuit is coupled to the read interface circuit to de-interlace the image data in the patch from the buffer. A receive circuit is coupled to the de-interlacing circuit to re-organize the de-interlaced image data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.