Scanning electron microscope system and method of manufacturing an integrated circuit
US6556703B1 · kind B1 · utility
7Cited by
11References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 24, 1997 |
| Grant date | Apr 29, 2003 |
| Priority date | — |
| Expiry date | Oct 24, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01N23/2251
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method and system for analyzing a substrate including the step of scanning the substrate to produce an intensity signal which represents the topography of the wafer to a first order. Other contributions to the signal intensity may be chemical composition and electrical state of the scanned features on the substrate. The scanned signal is compared and correlated to a reference signal to assess the substrate. The present invention is also directed to a method of manufacturing a wafer using the method and system and improving the manufacturing quality of product.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.