Memory system for multiple data types
US6557083B1 · kind B1 · utility
82Cited by
18References
10Claims
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Key dates
| Filing date | Jun 30, 2000 |
| Grant date | Apr 29, 2003 |
| Priority date | — |
| Expiry date | Nov 24, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system is provided for storing multiple data types. The memory system includes a main memory, a local cache, and a translation unit. The local cache has multiple entries, each of which includes a data field to store data and a status field to indicate a storage state for the stored data. The translation unit includes a translation lookaside buffer (TLB) and a status-cache (STC). The TLB stores address translations for data in the main memory, and the STC stores storage states for data indicated by the address translations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.