Patent · US Expired

Matrix converter

US6559532B1 · kind B1 · utility

14Cited by
3References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 15, 2000
Grant dateMay 6, 2003
Priority date
Expiry dateAug 15, 2020

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldElectrical machinery, apparatus, energy
  • WIPO sectorElectrical engineering

Abstract

Nine bidirectionally blocking power components are attached on a substrate in the form of a three-row matrix. The power components are attached between three respective current conductors arranged parallel to each other above and below the power components. The current conductors above the matrix proceed at a right angle relative to the current conductors under the matrix. The interconnects to the gate and auxiliary emitter terminals are situated on or in a thin insulating printed circuit board or film and are secured to the corresponding contacts of the chips in recesses of the current conductors.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.