Programmable interconnect for semiconductor devices
US6559544B1 · kind B1 · utility
Inventors
Key dates
| Filing date | Mar 28, 2002 |
| Grant date | May 6, 2003 |
| Priority date | — |
| Expiry date | Mar 28, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A structure for selectively programming interconnections between an input contact and an output contact segment in a multilayer semiconductor, comprising a first group of metal segments each being formed on successive layers of the semiconductor and being interconnected by vias, the first group including the output contact segment; a second group of metal segments each formed on successive layers of the semiconductor and being interconnected by vias, the second group including the input contact segment; and means for connecting a metal segment in the first group to a metal segment in a corresponding layer in the second group, thereby connecting the input contact to the output contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.