Mixer circuitry
US6559706B2 · kind B2 · utility
2Cited by
11References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 9, 2001 |
| Grant date | May 6, 2003 |
| Priority date | — |
| Expiry date | Aug 9, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D2200/0043
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A mixer circuit is described having three transistors connected in series across the supply rails. Two of the transistors carry signals, and these are arranged to be close to but not in saturation so that the circuit can operate with very low supply voltages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.