Semiconductor integrated circuit device
US6559718B2 · kind B2 · utility
6Cited by
2References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 14, 2001 |
| Grant date | May 6, 2003 |
| Priority date | — |
| Expiry date | Apr 26, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45612
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In order to decrease a change in the offset caused by high-frequency noise, filter circuits for cutting high-frequency noise are inserted between the input terminals of a differential amplifier circuit and input nodes of a differential amplifier stage, the filter circuits having a cut-off frequency which is higher than a cut-off frequency of the differential amplifier circuit but is lower than a cut-off frequency of a parasitic filter circuit constituted by a parasitic capacity and a parasitic resistance in the input unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.