Device and method for sampling rate conversion
US6559781B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 15, 2002 |
| Grant date | May 6, 2003 |
| Priority date | — |
| Expiry date | Jan 15, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/0671
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A resampler (1) is used to convert a digital input signal string (Sin) with an input sampling rate (fin) into a digital output signal string (Sout) with an output sampling rate (fout). An estimating unit (11) estimates a sampling rate ratio (Rk) between the input sampling rate (fin) and the output sampling rate (fout) and a setpoint phase of the output signal string (Sout). A regulating unit (12) compares an actual phase of the output signal string (Sout) to the setpoint phase, and generates a control signal (RTC,k) as a function of the estimated sampling rate ratio (Rk) and a deviation of the actual phase from the setpoint phase. An interpolator (7) interpolates the input signal string (Sin) for producing the output signal string (Sout) at sampling times whose temporal position is determined by the control signal (RTC,k).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.