Image display apparatus and method using output enable signals to display interlaced images
US6559839B1 · kind B1 · utility
51Cited by
5References
17Claims
0Family size
Assignees
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Key dates
| Filing date | Mar 22, 2000 |
| Grant date | May 6, 2003 |
| Priority date | — |
| Expiry date | Mar 22, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0224
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A matrix display panel has scan lines that are selected in consecutive order. An interlaced image signal is displayed by the use of one or more output enable signals that enable only every second selected scan line to be driven. A progressively scanned image signal having a frame rate too high to be handled by the matrix display panel is displayed as an interlaced image, by use of the same output enable signals. Consequently, no frame memory is needed for scanning conversion or frame-rate conversion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.