CAM circuit with radiation resistance
US6560156B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 14, 2002 |
| Grant date | May 6, 2003 |
| Priority date | — |
| Expiry date | Mar 14, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/043
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A CAM circuit including a RAM array, a CAM array, and a control circuit that systematically writes data from the RAM array to the CAM array, thereby preventing soft errors by continually restoring data that has been corrupted by radiation. The RAM and CAM arrays can be formed on the same substrate, but are preferably fabricated on separate substrates and mounted in a single package or on a PCB. Both the CAM and RAM can be formed using any conventional memory type (e.g., SRAM, DRAM, NVRAM), and the CAM array can be a binary, ternary, or quad CAM array. The CAM and RAM arrays can be formed on different substrates, or the same substrate. A system including an SRAM ternary CAM array and a RAM array perform quad CAM functions by performing read functions utilizing only the RAM array, while performing lookup functions using the ternary CAM array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.