Network switching architecture with multiple table synchronization, and forwarding of both IP and IPX packets
US6560229B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 1999 |
| Grant date | May 6, 2003 |
| Priority date | — |
| Expiry date | Jun 30, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S707/99945
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A network switch for network communications includes a first data port interface. The first data port interface supports a plurality of data ports transmitting and receiving data at a first data rate. A second data port interface is provided; the second data port interface supports a plurality of data ports transmitting and receiving data at a second data rate. A CPU interface is provided, with the CPU interface configured to communicate with a CPU. An internal memory is provided, and communicates with the first data port interface and the at least one second data port interface. A memory management unit is provided, and includes an external memory interface for communicating data from at least one of the first data port interface and the second data port interface and an external memory. A communication channel is provided, with the communication channel communicating data and messaging information between the first data port interface, the second data port interface, the internal memory, and the memory management unit. A plurality of semiconductor-implemented lookup tables are provided, with the lookup tables including an address resolution lookup/layer three lookup, rules tables…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.