Patent · US Expired

Interconnection process and interface using parallelized high-speed serial links

US6560275B2 · kind B2 · utility

6Cited by
3References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 14, 2002
Grant dateMay 6, 2003
Priority date
Expiry dateMay 14, 2022

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04J2203/0089
  • WIPO fieldTelecommunications
  • WIPO sectorElectrical engineering

Abstract

An interconnection interface for transmitting digital data between a sending module and a receiving module connected to one another through point-to-point serial links, forming a global data link. Each of the modules are provided, firstly, with a multiplexing unit associated with each of the serial links disposed in the module's physical layer, so as to distribute data transmitted through the global link at a speed determined by the sending module to a given number of parallel links, with each of these parallel links conveying a part of the transmitted data at a speed higher than the sending module data speed; and secondly, with a demultiplexing unit associated to the parallel links conveying received data parts, so as to synchronously and integrally reconstitute these received data parts at a speed accepted by the receiving module.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.