Arithmetic coding and decoding methods and related systems
US6560368B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 25, 1999 |
| Grant date | May 6, 2003 |
| Priority date | — |
| Expiry date | Jun 25, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T9/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Arithmetic coding and decoding, and compressing and decompressing methods and systems are described. In one embodiment, occurrence values are calculated that represent the number of times individual component values appear in an input stream that is to be encoded. The occurrence values are first normalized to ensure that they are all powers of 2. The occurrence values are then second normalized to ensure that the sum of all of the occurrence values is a power of 2. After normalization, encoding or compressing takes place through arithmetic techniques that utilize a range having a length equal to the normalized sum of the occurrence values. Various sub-ranges within the range are assigned to individual component values that are to be encoded. A position is defined within the range and a determination is made as to whether the position is within a sub-range that is necessary to encode an individual component value. If the position is not within the appropriate sub-range, then the position is moved, one or more encoding bits are emitted, and the new position is checked. When the position is found to be within the desired sub-range, the sub-range is expanded and the next component valu…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.