Electronics for a shock hardened data recorder

US6560494B1 · kind B1 · utility

Assignee

• United States of America as represented by the Secretary of the Air Force · US

Inventors

• Gabriel H. Soto · Ridgecrest, US
• Michael D. Haddon · Ridgecrest, US

Key dates

• Filing date: Jun 2, 2000
• Grant date: May 6, 2003
• Expiry date: May 30, 2021

Classification

• Technology area (CPC G): Physics
• CPC primary: G05B19/00
• WIPO field: Control
• WIPO sector: Instruments

Abstract

Electronics for a shock-hardened device, in particular a data recorder, incorporating non-volatile memory. The device has the functional elements: a signal conditioning circuit, an oscillator, an analog-to-digital converter (ADC), a field programmable gate array (FPGA), a trigger, and a non-volatile memory incorporating both electrically erasable programmable read only memory (EEPROM) and fast static random access memory (SRAM). As a recorder, the electronics enable efficient and reliable data recording in extreme shock environments, e.g., those involving dynamic testing of weapons such as target penetrating bombs or dual-stage warheads. It also provides for data retention upon loss or shutdown of power to the unit and yields high mean time between failures (MTBF) figures in more benign environments.