Write strategy and timing
US6560672B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2000 |
| Grant date | May 6, 2003 |
| Priority date | — |
| Expiry date | Oct 15, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/12
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for set-up of a group of parameter values needed in a CD-R or CD-RW write cycle, where the time allotted for set-up is as low as six clock cycles. In a clock cycle from a preceding write cycle, first and second parameter values are read into first and second registers, and a third parameter value is read into a first SRAM. In clock cycles 1-5 of the present write cycle, fourth, fifth, sixth, seventh and eighth parameter values are read into second, third, fourth, fifth and sixth SRAMs. In clock cycle no. 6 or later of the present write cycle, three sums (or differences) of selected combinations of these eight parameter values are calculated and stored, new first and second parameter values are read into first and second registers, and a new third parameter value is read into another SRAM. The method is generalized to K parameters stored in registers, N parameters stored in SRAMs and calculation of M selected linear combinations of the K+N parameter values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.