Error injection apparatus and method
US6560720B1 · kind B1 · utility
60Cited by
27References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 9, 1999 |
| Grant date | May 6, 2003 |
| Priority date | — |
| Expiry date | Sep 9, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/277
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a computer network system that includes a multiplicity of nodes interconnected by a network of switches, wherein data are normally conveyed in the network according to predetermined conventions, a method for simulation testing of the system. One of the nodes is selected to serve as an error injector and injects data into the network in a manner that violates the predetermined conventions, so as to simulate an error condition in the system. Operation of the system is observed following the injection of the data so as to evaluate a response of the system to the error condition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.