Phase independent frequency comparator
US6563346B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2001 |
| Grant date | May 13, 2003 |
| Priority date | — |
| Expiry date | Dec 13, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D13/003
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and circuit for comparing the frequencies of two clocks (clock—1 and clock—2), without taking into account their phase, is disclosed. Each clock is associated to a circular counter (100-1 and 100-2) which are initialized to different values, and the contents of the circular counters are compared. When the frequencies of the two clocks (clock—1 and clock—2) are equal, both counters (100-1 and 100-2) are incremented at a common frequency and thus, due to the initialization conditions, the contents of both counters can never be equal. Conversely, when the frequencies of the two clocks are different, the counters (100-1 and 100-2) are not increased at a common frequency and thus, after several clock pulses, the contents of the counters are equal, indicating different clock frequencies. In a preferred embodiment, the circular counters (100-1 and 100-2) are 2-bit circular counters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.