Semiconductor integrated circuit having output buffer
US6563351B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2001 |
| Grant date | May 13, 2003 |
| Priority date | — |
| Expiry date | Sep 27, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/162
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit includes first and second MOS transistors and a capacitor. The first MOS transistor has a drain connected to an output terminal, a gate and a source. The second MOS transistor has a gate, a drain connected to the source of the first MOS transistor and a source and has the same conductivity type as the first MOS transistor. The capacitor has one electrode connected to the gate of the first MOS transistor and the other electrode connected to a node whose potential changes in a complementary fashion with respect to the drain potential of the first MOS transistor and functions to cancel out an influence, caused by the coupling of a mirror capacitor which exists between the gate and drain of the first MOS transistor, affecting the gate potential of the first MOS transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.