Method and apparatus for executing commands in a graphics controller chip
US6563505B1 · kind B1 · utility
10Cited by
15References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 20, 1996 |
| Grant date | May 13, 2003 |
| Priority date | — |
| Expiry date | Jun 23, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/14
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A graphics controller circuit for minimizing an amount of data received from a host. The graphics controller circuit includes a register file with a plurality of registers. The graphics controller accepts commands addressed to virtual registers, and generates plurality of instructions including an instruction to access one of the registers in the register file. By using such a virtual register number in a command and generating several instructions in response thereto, the graphics controller circuit of the present invention minimizes the amount of data host sends over the system bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.