Frequency generation circuit and method of operating a tranceiver

US6564039B1 · kind B1 · utility

Assignee

• Motorola, Inc. · US

Inventors

• Richard B. Meador · Austin, US
• Ronald H. Deck · Pembroke Pines, US
• David J. Graham · Gilbert, US
• David H. Minasi · Sunrise, US
• Brian R. Shelton · Gatineau, CA

Key dates

• Filing date: Feb 29, 2000
• Grant date: May 13, 2003
• Expiry date: Feb 29, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H04B2001/0491
• WIPO field: Telecommunications
• WIPO sector: Electrical engineering

Abstract

A frequency generation circuit includes an oscillator (403), a comparator (413) coupled to the oscillator, a first divider (407) coupled to the comparator, a PLL (400) coupled to the first divider, a second divider (422) coupled to the PLL, a first multiplexor (409) coupled to the second divider, a third divider (408) coupled to the comparator and the first multiplexor, a second multiplexor (410) coupled to the comparator and the reference clock PLL, a fourth divider (411) coupled to the second multiplexor, a fifth divider (412) coupled to the comparator, and a seventh divider (450) coupled to the comparator. A method of operating a transceiver includes using the frequency generation circuit to provide a first clock signal, a second clock signal, a first reference frequency, and a second reference frequency for a first component, a second component, a third component, and a fourth component, respectively, of the transceiver.