Method and system for handling interrupts in a node controller without attached processors
US6564277B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 1999 |
| Grant date | May 13, 2003 |
| Priority date | — |
| Expiry date | Sep 30, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A node controller (12) includes a processor interface unit (24) that receives an interrupt signal (50). The processor interface unit (24) includes a register (52) with a forward enable bit (54). In response to the forward enable bit (54) being set, the processor interface unit (24) generates a forward interrupt signal (56) for transfer to an input/output interface unit (26) of the node controller (12). The input/output interface unit (26) generates an interrupt request for transfer to a remote node controller. The input/output interface unit (26) includes an interrupt destination register (58) that includes an identity of a particular remote node controller and associated processor interface unit to which the interrupt request is to be transferred. The remote node controller having a processor attached thereto to handle the interrupt request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.