Self-aligned coaxial via capacitors
US6565730B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 1999 |
| Grant date | May 20, 2003 |
| Priority date | — |
| Expiry date | Dec 29, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/43
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The various embodiments of coaxial capacitors are self-aligned and formed in a via, including blind vias, buried vias and plated through holes. The coaxial capacitors are adapted to utilize the plating of a plated via as a first electrode. The dielectric layer is formed to overlie the first electrode while leaving a portion of the via unfilled. A second electrode is formed in the portion of the via left unfilled by the dielectric layer. Such coaxial capacitors are suited for use in decoupling and power dampening applications to reduce signal and power noise and/or reduce power overshoot and droop in electronic devices. For such applications, it is generally expected that a plurality of coaxial capacitors, often numbering in the thousands, will be coupled in parallel in order to achieve the desired level of capacitance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.