SOI annealing method and SOI manufacturing method
US6566255B2 · kind B2 · utility
11Cited by
11References
34Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 25, 2001 |
| Grant date | May 20, 2003 |
| Priority date | — |
| Expiry date | Oct 24, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76259
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The HF defect density in an SOI is reduced. An SOI having a thickness of 200 nm or less is annealed in an inert atmosphere at a temperature between the eutectic temperature (e.g., 966° C.) of a semiconductor metal compound (e.g., nickel silicide) formed from a metal and the semiconductor material of the crystal semiconductor of the SOI (inclusive) and the melting point of the semiconductor material (inclusive).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.